Our NAND Flash SLC very large page family is targeted for a wide range of applications that require the simplicity of a single-chip code plus data non-volatile memory solution. The devices are available in 8 Gbit to 32 Gbit densities, with a 3 V supply voltage, x8 bus width, and a 4 Kbytes (4096 + 128 spare) page size.
NAND SLC very large page family allows very high data throughput combined with fast write time and low power consumption
These special features deliver increased system performance and innovation for applications using NAND Flash SLC very large page devices:
- Copy back program mode, to optimize management of defective blocks
- Cache read mode, to improve read throughput
- Multiplane program to improve program throughput
- Chip enable don't care, for easy code download by MCUs
- Boot from NAND at power-on downloading boot sector in RAM
- Serial number and OTP area
- Hardware data protection pin
All devices are footprint-independent with modular interface for easy density upgrade, and are available in TSOP and LGA packages.
|
Voltage |
3V (2.7 V - 3.6 V) |
| Configuration |
x8 |
| Page Size |
4 Kbytes (4096 + 224 spare bytes) |
| Block Size |
512 Kbytes + 28 Kbytes spare |
| Cache read throughput |
38 Mbytes/s |
| Multiplane program throughput |
20 Mbytes/S |
| Features |
Multiplane program - cache read - cache program |
| Special Features |
OTP area - Unique Identifier |