SDRAM

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SDRAM Solutions Deliver Features and Flexibility

We have one of the broadest SDRAM offerings in the industry. Several densities; extended operating temperatures; and various clock rates, cycle times, and package types make it easy to get just what you need—it’s a relatively simple, cost-effective, and easy-to-implement memory option for both new and existing designs.

metal cogsA Great Memory Solution for the Long Term

Why complicate your design? If a simple, cost-effective SDRAM solution will do, plug it in and go. You already know it’s a reliable part. You know it’s got all the features you’re looking for. Plus it’s a solid long-term solution. We have plans to support it for years to come so it’s still a good fit for products with long life cycles.

Our 3.3V SDRAM family offers plenty of options. In fact, we have one of the broadest offerings in the industry today. Choose from multiple densities, extended operating temperatures, and various clock rates, cycle times, and package types to get just what you need.

SDRAM Part Catalog and Documentation


Stable Supply
Stability, flexibility, and availability are all characteristics that describe an ideal long-term memory solution. Our SDRAM memory is that kind of solution—the kind you need for the long haul to support your established, proven products. And not only do we have the solutions you need, we’ll help you make the best use of the technology. See our SDRAM part catalog for a complete list.

Technical Support
With Micron, you get great memory, backed by experienced technical support—from comprehensive data sheets to time-saving simulation models. We have the FAEs and design development tools to make your job easier. You can dive into our technical resources on a do-it-yourself design or work with one of our local field applications engineers if your mass-market project presents a unique challenge. Whatever you need to get your design to market faster, easier, and better—we want to deliver it.

Specification Description
Densities 64Mb, 128Mb, 256Mb, 512Mb
Configurations x4, x8, x16, x32
Supply Voltage 3.3V
Clock Frequencies 133–200 MHz
Temperature Ranges 0° to +70°C
-40°C to +85°C
-40°C to +105°C**
Packages 54- and 60-ball FBGA
54- and 90-ball VFBGA
54- and 86-pin TSOP
**Contact factory for availability

Type Secure Title & Description ID# Updated Size
IBIS Behavioral Models:  Micron has been a member of the IBIS Open Forum for many years and fully supports the IBIS specification. IBIS models for most Micron products are available for download from the Micron Web site. TN-00-07 11/2009 163.98 KB
Thermal Applications:  Defines a general method and criteria for measuring and ensuring that Micron components and modules do not exceed the maximum allowable temperature TN-00-08 05/2010 252.18 KB
Understanding Quality and Reliability Requirements for Bare Die Applications:  Describes the quality and reliability requirements for bare die applications TN-00-14 10/2009 152.83 KB
Recommended Soldering Parameters:  Defines the recommended soldering techniques and parameters for Micron Technology, Inc., products. TN-00-15 03/2007 69.09 KB
Uprating of Semiconductors for High-Temperature Applications:  Describes the issues associated with temperature uprating and the risks involved in using components and/or systems outside the manufacturer's environmental specifications TN-00-18 05/2010 428.33 KB
Understanding Signal Integrity:  Describes how memory design, test, and verification tools can be used to the greatest advantage, from conception of a new product through end of life TN-00-20 12/2009 1.52 MB
SEMI Wafer Map Format:  Micron has adopted the wafer map file format approved by Semiconductor Equipment and Materials International (SEMI). With SEMI formatting, Micron's customers can be confident they will always receive consistent, compatible, reliable map files. TN-00-21 02/2009 110 KB
Thinning Considerations for Wafer Products:  Information on optimal wafer-thinning processes to meet specific customer requirements TN-00-19 10/2009 73.58 KB
LVTTL Derating for SDRAM Slew Rate Violations:  Describes the proper setup and hold time derating when the slew rate during transition time violates specification. TN-48-09 11/2009 196.24 KB
Backward Compatibility for Faster SDRAM:  Reviews the timing differences between SDRAM generations and shows how the faster Micron parts are compatible with the slower parts TN-48-15 10/2005 79.21 KB
PCN/EOL Systems:  Explains Micron's product change notification and end-of-life systems. CSN-12 08/2009 75.58 KB
Wafer Packaging and Packaging Materials:  Provides complete shipping and recycling information about each of the materials used for shipping Micron's products. CSN-20 09/2011 776.24 KB
Bare Die SiPs and MCMs:  Describes design considerations for bare die SiPs and MCMs. CSN-18 04/2009 151.06 KB
Shipping Quantities:  Provides tables of part quantity. CSN-04 10/2011 463.55 KB
Micron KGD Definitions:  Describes the testing specifications and parameters for Micron's KGD-C1 and KGD-C2 DRAM die. CSN-22 07/2009 65.52 KB
Proper Handling Procedures for Modules:  Includes procedures for how to properly handle modules. CSN-23 12/2007 1.02 MB
Micron Component and Module Packaging:  Explanation of Micron packaging labels and procedures. CSN-16 02/2012 840.61 KB
ESD Precautions for Die/Wafer Handling and Assembly:  Describes the benefits of controlling ESD in the workplace, including higher yields and improved quality and reliability, resulting in reduced manufacturing costs. CSN-24 08/2010 119.08 KB
Electronic Data Interchange:  Describes EDI transmission sets, protocol, and contacts. CSN-06 09/2005 53.5 KB
RMA Procedures for Packaged Product and Bare Die Devices:  Outlines standard returned material authorization (RMA) procedures, as well as the differences associated with bare die RMAs. CSN-07 10/2010 82.64 KB
ISO System Management Standards:  Describes ISO system management standards. CSN-08 04/2004 39.18 KB
The Future of Memory and Storage:  Overview of trends for main memory and Flash memory 12/2009 1.54 MB
Interfacing SDRAM Devices with Motorola's MPC8xx:  Describes how to interface SDRAM devices with Motorola's MPC8xx TN-48-12 12/2001 176.99 KB
Designing in SDRAM for Future Upgrades:  Describes how to design in SDRAM for future upgrades TN-48-08 03/2004 126.15 KB
Designing Competitive DDR Platforms:  11/2009 2.64 MB
SDRAM System-Power Calculator:  11/2009 54 KB
DRAM Component Part Numbering System:  Part numbering guide for DDR3/DDR2/DDR/SDR SDRAM, Mobile LPDRAM, and RLDRAM components 02/2012 39.77 KB
FBGA Date Codes:  Date codes for FBGA-packaged components 08/2005 22.36 KB
Accelerate Design Cycles with Simulation Models:  Micron supplies the tools and guidelines necessary to verify new designs prior to layout. This technical note discusses software model support, signal integrity optimization, and logic circuit design. TN-00-09 02/2010 206.91 KB
Design Guide - Dealing with DDR2/DDR3 Clock Jitter:  Explores DDR2/DDR3 clock jitter specifications and provides guidance on how to apply them and how to deal with violations TN-04-56 09/2008 272.53 KB
Micron Wire-Bonding Techniques:  This technical note provides guidance on wire bonding techniques for both nickel-palladium (NiPd) and aluminum (Al) bond pads on Micron products. TN-00-22 11/2010 66.13 KB
Industrial and Multi-Market Applications Flyer:  Our extensive and stable portfolio of IMM-focused memory solutions empower technology developments in automotive, industrial, medical, manufacturing, and other multi-market segments. Product Flyer 08/2011 593.95 KB
Micron BGA Manufacturer's User Guide:  Provides information to enable customers to easily integrate both leading-edge and legacy Micron's ball grid array (BGA) packages into their manufacturing processes. It is intended as a set of high-level guidelines and a reference manual describing typical package-related and manufacturing process-flow practices. CSN-33 07/2011 353.32 KB
SDRAM I/O Characteristics Comparison of 54nm to 130nm Die:  This technical note compares the I/O characteristics of the 54nm to the 130nm single data rate (SDR) synchronous dynamic random access memory (SDRAM) die. TN-00-24 08/2011 515.31 KB
Product Marks/Product and Packaging Labels:  Explains product part marking, and product and packaging labels. CSN-11 02/2012 666.83 KB
Bypass Capacitor Selection for High-Speed Designs:  Describes bypass capacitor selection for high-speed designs. TN-00-06 03/2011 481.9 KB

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Can CKE be tied HIGH throughout SDRAM operation (initialization and normal operation)?
JEDEC does not specify the exact state of CKE during initialization; it is supplier specific. Micron strongly recommends CKE be kept at an LVTTL logic LOW before applying a stable CLK signal. During normal operation, CKE can be tied HIGH. The initial LOW state of CKE prevents parts from receiving an illegal LMR command, which could put the part into an unknown or unexpected state.
Can the SDRAM clock frequency be changed?
Micron SDRAM data sheets require that the clock frequency be constant during access or precharge states (READ, WRITE, tWR, and PRECHARGE commands). At other times frequency should not matter much because there is no DLL in SDRAM however, we do not recommend it. Lowering SDRAM frequency is OK even if you are not doing an LMR and CAS latency change. In case of increasing frequency, ensure tCK and CAS latency specifications are met. In either case, all other data sheet timing specifications should be adhered to.
Is there a recommended lowest working frequency for SDRAM?
Because SDRAM does not have a DLL, there is no recommended lowest frequency. SDRAM parts will work at very low frequencies if all data sheet specifications are met. It is important to maintain a good slew rate, however, since a very slow slew rate will affect setup and hold-time transitions. Also, for operating frequencies of 45 MHz, tCKS = 3.0ns. For more information, see TN-48-09.
What is the air speed velocity of an unladen sparrow?
Affrican or European?

SDRAM

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